The invention relates generally to semiconductor memory devices, and more particularly to EPROMs, EEPROMs, mask ROMs, and other read-only semiconductor memory devices.
In semiconductor memory devices, memory cells storing information are generally connected to a bit line. The potential of this bit line changes depending on information stored in a selected memory cell. The bit line potential thus determined is compared with a reference potential by a differential amplifier. By setting the reference potential beforehand at the mean value of the changing potential of the bit line, the differential amplifier detects, upon comparison, information stored in the selected memory cell.
When a memory chip is not selected, the bit line is discharged to the low level, preventing itself from falling into a floating condition. Therefore, the chip enable access time t.sub.CE, which is the time from the time point at which a chip enable signal CE reaches a high level to the time mpoint at which the data is outputted, includes a re-charging time of the bit line, which has discharged to the low level. The access time of the chip itself is the chip enable access time t.sub.CE or the address access time t.sub.ACC, whichever is longer. The address buffer circuit, however, is controlled by the chip enable signal CE, so that, in conventional memory devices, the chip enable access time t.sub.CE is longer than the address access time t.sub.ACC by a delay due to the chip enable buffer circuit.